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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
February 2006
FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Features
90% Peak Efficiency Low EMI Low Ripple Selectable Output Voltage 1.2V/1.5V for FAN5631 Efficiency Optimizer Feature for FAN5632 Input Voltage Range: 2.2V to 5.5V Output Current: Up to 250mA 5% Output Voltage Accuracy 30A Operating Current ICC < 1A in Shutdown Mode 1.7MHz Operating Frequency Shutdown Isolates Output from Input Soft-Start Limits In-Rush Current Short Circuit and Over Temperature Protection Minimum External Component Count Available in a 3x3mm 10-Lead MLP Package
Description
The FAN5631/FAN5632 is an advanced, third-generation switched capacitor step-down DC/DC converter utilizing Fairchild's proprietary ScalarPumpTM technology. This innovative architecture utilizes scalar switch re-configuration and fractional switching techniques to produce low output ripple, lower ESR spikes, and improve efficiency over a wide load range. The FAN5631/FAN5632 produces a fixed regulated output voltage from an input voltage of 2.2V to 5V. Customized output voltages are available in 100mV increments from 1V to 1.8V. Contact a Fairchild sales representative for customized output voltage options. In order to maximize efficiency, the FAN5631/5632 achieves regulation by skipping pulses. Depending upon load current, the size of the switches are scaled dynamically; consequently, current spikes and EMI are minimized. An internal soft-start circuitry prevents excessive current drawn from the supply. The device is internally protected against short circuit and over temperature conditions. The FAN5631 has a dual output voltage feature. When VSEL is high, VOUT is 1.5V and when VSEL is low, VOUT is 1.2V. Other output voltage options are available upon request. In addition, the FAN5632 has an efficiency optimizer feature that, when enabled, changes the switch mode configuration from 2:1 to 1:1 at the lower threshold of VIN. The efficiency is then maintained at its peak level over a wider range of input voltages. In addition, VOUT will vary between 1.2V to 1.5V as a result of this efficiency optimization. If the efficiency optimizer is not enabled, VOUT is regulated to 1.5V. Both the FAN5631 and FAN5632 are available in a 3x3mm 10-lead MLP package.
Applications
Cell Phones Handheld Computers Portable Electronic Equipment Core Supply to Next Generation Processors Low Voltage DC Bus Digital Cameras DSP Supplies
Ordering Information
Product Number
FAN5631 FAN5632
Package Type
3x3mm 10-Lead MLP 3x3mm 10-Lead MLP
Order Code
FAN5631MPX FAN5632MPX
(c)2006 Fairchild Semiconductor Corporation
1
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FAN5631/FAN5632 Rev. 1.0.2
FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Typical Application
90 2:1 Mode Efficiency % 80 70 60 50 40 3.24 3.51 3.78 4.05 4.32 4.59 4.86
VOUT = 1.2V to 1.5V COUT 10F
1:1 Mode
ON OFF
VSEL EN GND
1 2 3 4 5
10 9 8 7 6
NC NC NC CIN 10F VIN = 2.7V to 5.5V
FAN5631 FAN5632 with optimization
CB+ CB-
Input Voltage (V)
Average Efficiency (over VIN = 2.7V to 5V) = 66%, With optimization = 77% Average Efficiency (over VIN = 2.7V to 4.2V) = 67%, With optimization = 84%
Figure 1. Typical Application
Figure 2. Typical Efficiency Graph
Pin Assignment
Top View
VSEL EN CB+ GND CB1 2 3 4 5 10 9 8 7 6
NC VIN NC NC VOUT
3x3mm 10-Lead MLP
Figure 3. Pin Assignment
Pin Description
Pin No.
1
Pin Name
VSEL
Pin Description
Output Voltage Select Logic Input Pin. The VSEL pin can not be left floating and must be connected to either a logic high or logic low level. FAN5631: If a logic low is applied to the VSEL pin then VOUT is 1.2V. If a logic high is applied then VOUT is 1.5V. FAN5632: If a logic low is applied to the VSEL pin, the efficiency optimization mode is enabled, and the output voltage accuracy is relaxed in order to meet optimum efficiency. However, if a logic high is applied, the device will operate like a typical charge pump converter. Enable Input Pin. If a logic high is applied to the EN pin, the device is enabled. However, if a logic low is applied, the device is disabled and the supply current is reduced to less than 1A. The EN pin can not be left floating and must be connected to either a logic high or logic low level. Bucket Capacitor Positive Pin. Ground Pin. This pin is connected to the internal MOSFET switches. This pin must be externally connected to GND. Bucket Capacitor Negative Pin. Output Voltage Pin. Not Connected. This pin is not internally connected. Not Connected. This pin is not internally connected. Supply Voltage Input. Not Connected. This pin is not internally connected.
2
EN
3 4 5 6 7 8 9 10
CB + GND CB VOUT NC NC VIN NC
2 FAN5631/FAN5632 Rev. 1.0.2
5.13
2.97
2.7
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Absolute Maximum Ratings (Note1)
Parameter
VIN to GND All other pins to GND Load Current Thermal Resistance-Junction to Tab (JC), 3mmx3mm 10-lead MLP (Note 2) Lead Soldering Temperature (10 seconds) Storage Temperature Junction Temperature Electrostatic Discharge (ESD) Protection Level (Note 3) HBM CDM -65 -40 2.5 2
Min
-0.3 -0.3
Max
6 VIN + 0.3V 0.5 8 260 150 150
Unit
V V A C/W C C C kV
Recommended Operating Conditions
Parameter
Supply Voltage Range Output Current (VIN > 2.7V) Operating Ambient Temperature Range -40 25
Min
2.2
Typ
Max
5.5 250 +85
Unit
V mA C
Notes: 1. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to AGND. 2. Junction to ambient thermal resistance, JA, is a strong function of PCB material, board thickness, thickness and number of copper planes, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics. The estimated value for zero air flow at 0.5W is 60C/W. 3. Using Mil Std. 883E, method 3015.7(Human Body Model) and EIA/JESD22C101-A (Charge Device Model).
3 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Electrical Characteristics
VIN = 2.2V to 5.5V, IOUT = 1mA, CIN = 10F, COUT = 10F, CB = 1F, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C. Parameter
Input Under-Voltage Lockout No Load Supply Current Output Voltage No switching FAN5631, SEL to HIGH FAN5631, SEL to LOW FAN5632, SEL to HIGH FAN5632, SEL to LOW Output Voltage Accuracy Load Regulation Line Regulation Shutdown Supply Current Output Short Circuit Current (Note 4) Peak Efficiency VIN at Configuration Change Oscillator Frequency Thermal Shutdown Threshold Thermal Shutdown Threshold Hysteresis Enable Logic Input High Voltage, VIH Enable Logic Input Low Voltage, VIL Enable Logic Input Current VSEL Logic Input High Voltage, VIH VSEL Logic Input Low Voltage, VIL VSEL Logic Input Current VOUT Turn On Time -1 1.6 -1 1.3 0.4 1 1.3 0.4 1 VIN decreasing VIN = 3.6V, IOUT = 150mA 1mA IOUT 150mA, VIN = 2.7V to 5.5V 0mA IOUT 150mA, VIN = 3.6V IOUT = 0.1mA VEN = 0V VOUT 150mV -5 0.25 0.2 0.1 25 90 2.22 x VOUT 1.7 150 15 1.5 1.2 1.5 Variable between 1.5 and 1.2 +5 1 4 1 % mV/mA mV/V A mA % V MHz C C V V A V V A mS
Conditions
Min.
Typ.
2
Max.
60
Units
V A V
Notes: 4. The short circuit protection is designed to protect against pre-existing short circuit conditions, i.e. assembly shorts that exist prior to device power-up. The short circuit current limit is 25mAAverage. Short circuit currents in normal operation are inherently limited by the ON-resistance of the internal FET. Since this resistance is in the range of 1, in some cases thermal shutdown may occur. However, immediately following the first thermal shutdown event, the short circuit condition will be treated as pre-existing, and the load current will reduce to 25mAAverage.
4 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Typical Performance Characteristics
TA = 25C, VOUT = 1.5V, VIN = 3.6V, CIN = 10F, COUT = 10F, CB = 1F, unless otherwise noted.
Efficiency vs. Input Voltage
90 85 80 75
V SEL = HIGH V OUT = 1.5V ILOAD = 150mA
Efficiency vs. Load Current
90 85
VIN = 3.3V VSEL = HIGH
Power Efficiency (%)
80 75 70 65 60 55 50 45
Efficiency (%)
70 65 60 55 50 45 40 35 30 2 2.5 3 3.5 4 4.5 5 5.5
VIN = 4.2V
VIN = 2.7V
40 1 10 100
Input Voltage (V)
Load Current (mA)
FAN5632 Efficiency Optimizer Efficiency and Output Voltage vs. Input Voltage
100
Line Regulation
1.60
ILoad = 50mA
Efficiency (%)
90 80 70 60 50
ILOAD = 100mA, VSEL = LOW
Output Voltage (V)
1.55
TA = 25C
1.5 1.4 1.3 1.2
Output Voltage (V)
1.50
TA = 85C TA = -40C
1.45
1.40
2.5 3 3.5 4 4.5 5 5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage(V)
Load Regulation
0.5 1.54
3.2V 2.7V 3.6V 5.5V
Thermal Regulation
VIN = 3.6V ILOAD = 1mA
Load Regulation (mV/mA)
0
-0.5
2.2V
Output Voltage (V)
180
1.53
1.52
-1
1.51
-1.5
-2
0
20
40
60
80
100
120
140
160
1.50 -50
-25
0
25
50
75
100
125
150
Load Current (mA)
Ambient Temperature (C)
5 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Typical Performance Characteristics
TA = 25C, VOUT = 1.5V, VIN = 3.6V, CIN = 10F, COUT = 10F, CB = 1F, unless otherwise noted.
Start Up Dynamic VOUT Change (FAN5631)
VEN VSEL Low VOUT 1.5V 1.2V 1.2V Low ILOAD = 150mA High
VOUT 75mA IIN 0mA (20s/div)
Voltage Ripple
VIN = 3.6V ILOAD = 150mA
Output Voltage Ripple Spectrum
VOUT
VIN
6 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Block Diagram
VIN
0.25SW1 0.25SW1 0.5SW1
OSCILLATOR (2MHz)
IN VOLTAGE REF. OUT - CONFIGURATION + 0.25SW2 0.25SW2 0.5SW2
C+
SOFT START Vref. RAMP Vref. RAMP FB
- PULSE_SKIP +
CONTROL LOGIC
OUTPUT 150mV
+
SHORT_CKT.
D R I V E R S
0.25SW3 0.25SW3 0.5SW3
VOUT
C-
0.25SW4 0.25SW4 0.5SW4
0.5* INPUT 1V
+
UVLO SHUTDOWN
THERMAL SHUTDOWN
FB
ENABLE
GND.
Figure 4. Block Diagram
Detailed Description
The FAN5631/FAN5632 switched capacitor DC/DC converter automatically configures switches to achieve high efficiency and provides a regulated output voltage by means of the Pulse Frequency Modulation (PFM) pulse-skipping mode. An internal soft-start circuit prevents excessive in-rush current drawn from the supply. The switches are split into three segments. Based on the values of VIN, VOUT and IOUT, an internal circuitry determines the number of segments to be used to reduce current spikes.
switch 4 is always ON. At the 1.6V output setting the configuration changes from 2:1 to 1:1 at VIN = 3.56V. At the 1.3V output setting the change occurs at VIN = 3.06V.
Pulse-Skipping PFM and Fractional Switch Operation
When the regulated output voltage reaches its upper limit, the switches are turned off and the output voltage reaches its lower limit. Considering a step-down 2:1 mode of operation, 1.6V output as an example, when the output reaches about 1.62V (upper limit), the control logic turns off all switches. Switching stops completely. This is pulse-skipping mode. Since the supply is isolated from the output, the output voltage will drop. Once the output drops to about 1.58V (lower limit), the device will return to regular switching mode with one quarter of each switch turning on first. Another quarter of each switch will be turned on if VOUT cannot reach regulation by the time of the third charge cycle. Full switch operation occurs only during startup or under heavy load condition, when a half switch operation cannot achieve regulation within seven charge cycles.
Step-Down Charge Pump Operation
When VIN 2 x VOUT/0.9, a 2:1 configuration, as shown in Fig. 5, is enabled. The factor 0.9 is used instead of 1 in order to account for the effect of resistive losses across the switches and to accommodate hysteresis in the voltage detector comparator. Two phase non-overlapping clock signals are generated to drive four switches. When switches 1 and 3 are ON, switches 2 and 4 are OFF and CB is charged. When switches 2 and 4 are ON, switches 1 and 3 are OFF and charge is transferred from CB to COUT. When VIN < 2 x VOUT/0.9, a 1:1 configuration, as shown in Fig. 6 is enabled. In the 1:1 configuration switch 3 is always OFF and
Soft-Start
The soft-start feature limits in-rush current when the device is initially powered up and enabled. The reference voltage is used to
7 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Switch Configuration
VIN VIN
S1 C+
S1 C+
S2 S2 C VOUT
B
VOUT
C B
S3 CC
S3 CC S4
OUT
OUT
S4
GND
GND
This configuration shows the switches in the charging phase position. For the pumping phase, reverse all switch positions.
This configuration shows the S1 and S2 swithces in phase 1 position. For phase 2, reverse the positions of the S1 and S2 switches. The S3 switch is always OFF, and the S4 switch is always ON.
Figure 5. Mode 2:1 Configuration
control the rate of the output voltage ramp-up to its final value. Typical start-up time is 1ms. Since the rate of the output voltage ramp-up is controlled by an internally generated slow ramp, pulse-skipping occurs and in-rush current is automatically limited.
Figure 6. Mode 1:1 Configuration
Applications Information
The FAN5631/FAN5632 requires one ceramic bucket capacitor in the 0.1F to 1F range; one 10F output bypass capacitor and one 10F input bypass capacitor. To obtain optimum output ripple and noise performance, use of low ESR (<0.05) ceramic input and output bypass capacitors is recommended. The X5Rand X7R-rated capacitors provide adequate performance over the -40C to 85C temperature range. The bucket capacitor's value is dependent on load current requirements. A 1F bucket capacitor will work well in all applications at all load currents, while a 0.1F capacitor will support most applications under 100mA of load current. The choice of bucket capacitor values should be verified in the actual application at the lowest input voltage and highest load current. A 30% margin of safety is recommended in order to account for the tolerance of the bucket capacitor and the variations in the on-resistance of the internal switches. One of the key benefits of the ScalarPumpTM architecture is that the dynamically scaled on-resistance of the switches effectively reduces the peak current in the bucket capacitor and therefore input and output ripple currents are also reduced. Nevertheless, due to the ESR of the input and output bypass capacitors, these current spikes generate voltage spikes at the input and output pins. However, these ESR spikes can be easily filtered because their frequencies lie at up to 12 times the clock frequencies. In
Shutdown, UVLO, Short Circuit Current Limit and Thermal Shutdown
The device has an active-low shutdown pin to decrease supply current to less than 1A. In shutdown mode, the supply is disconnected from the output. UVLO triggers when supply voltage drops below 2V. When the output voltage is lower than 150mV, a short circuit protection is triggered. In this mode 15 out of 16 pulses during the switching will be skipped and the supply current is limited. Thermal shutdown triggers at 150C.
Efficiency Optimizer (FAN5632)
For higher efficiency in the FAN5632, VSEL should be tied to ground to enable the efficiency optimizer feature. To achieve an optimized efficiency, the switch mode configuration transition point is shifted from a 2:1 to a 1:1 mode until the output voltage falls to 20% of its nominal value. For example, when the nominal output voltage is 1.5V, the output voltage is allowed to drop to 1.2V. This will maintain a peak efficiency of 85% for the input voltage range of 2.9V to 3.5V. For normal operation, VSEL should be tied high.
8 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
applications where conductive and radiated EMI/RFI interference has to be kept as low as possible, consider the use of additional input and output filtering.
PCB Layout Considerations
While evaluating the FAN5631/FAN5632 (or any other switched capacitor DC-DC converter) the user should be careful to keep the power supply source impedance low; use of long wires
causing high lead inductances and resistive losses should be avoided. A carefully laid out ground plane is essential because current spikes are generated as the bucket capacitor is charged and discharged. The input and output bypass capacitors should be placed as close to the device pins as possible.
9 FAN5631/FAN5632 Rev. 1.0.2
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FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
Mechanical Dimensions
3x3mm 10-Lead MLP
10 2.25 2.20 2.00
0.78 0.55
0.15 C
3.0
A B
6
2X
2.33
3.0
0.15 C
0.23 0.50 D 1
2X TOP VIEW 0.8 MAX
0.10 C (0.20) 0.08 C 0.05 0.00
SEATING PLANE
0.02 5
RECOMMENDED LAND PATTERN
SIDE VIEW
(3.000.10) 2.250.05 (0.38) 1 5
C
PIN #1 IDENT
1.550.05
(3.000.10)
0.400.05 10 0.5 2.0
0.30 0.20
6 0.10 0.05 CAB C
BOTTOM VIEW
A. CONFORMS TO JEDEC REGISTRATION MO-229, VARIATION WEED-5 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LAND PATTERN DIMENSIONS ARE NOMINAL REFERENCE VALUES ONLY
10 FAN5631/FAN5632 Rev. 1.0.2
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1.55 2.00 3.10
0.25
MLP10B rev A
FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM 2 E CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM
DISCLAIMER
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PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3
SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDiS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I17
11 FAN5631/FAN5632 Rev. 1.0.2
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